Location
bayan lepas, penang, Malaysia
Posted
June 19, 2026
Job Description
UST in Malaysia is seeking a skilled engineer to execute VLSI Frontend, Backend, or Analog design projects. Responsibilities include delivering high-quality designs, supporting junior engineers, and implementing innovative automation approaches.
This role requires expertise in System Verilog, ASIC verification, and strong analytical skills. Candidates should have a degree in Electrical or Computer Engineering and experience with relevant design and verification tools.
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