Senior Verification Engineer

Full-time Engineering

Senior Verification Engineer Location: Bangalore/Hyderabad Experience: 4 years 1Must have very good System Verilog/UVM experience Must have expertise in PCI gen6 and CXL3.1or Ethernet bus protocols Have experience in IP/SoC Verification Expertise in AMBA/AXI bus protocols and ARM CPU Experience in developing functional verification environments including the components like monitors, checkers, scoreboards and assertions Experience in code and functional coverage Scripting Language (PERL/Python/Shell/Makefile) Must have good debugging and problem-solving skills Good to have GLS verification experience Educational Qualification: BE/ME or BTech /MTech