Location
jalisco, jalisco, Mexico
Posted
July 26, 2026
Job Description
Position Overview
This role requires candidates to upload a resume in English and will only consider an English version of the resume.
Responsibilities Perform functional logic verification of an integrated So C to ensure design meets specifications. Define and develop scalable and reusable block, subsystem, and So C verification plans, test benches, and verification environments to achieve required coverage and meet microarchitecture specifications. Execute verification plans and run emulation and system‑simulation models to verify design, analyze power and performance, and uncover bugs. Replicate, root‑cause, and debug issues in the pre‑silicon environment, and implement corrective measures to resolve failing tests. Collaborate and communicate with So C architects, microarchitects, full chip architects, RTL developers, post‑silicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and lead technic...