Senior Silicon Packaging Design Lead

Intel

Full-time Engineering
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Location
kulim, kedah, Malaysia
Posted
July 10, 2026

Job Description

Intel is seeking a Silicon Packaging Design Engineer in Kulim, Malaysia. This position involves driving substrate design processes, collaborating with teams to enhance product performance, and utilizing advanced design tools.

Ideal candidates will have a Bachelor’s degree in Engineering and a minimum of 4 years of experience in substrate/package design, showcasing strong problem-solving and collaboration skills.

This role supports a hybrid work model and emphasizes innovation and continuous learning within Intel's industry-leading team.

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