Senior Silicon Packaging Design Lead

Intel

Full-time Engineering
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Location
george town, penang, Malaysia
Posted
July 12, 2026

Job Description

Intel is seeking a Silicon Packaging Design Engineer to lead the end-to-end development of innovative substrate designs. You will be responsible for optimizing performance and manufacturability while collaborating with cross-functional teams.

The ideal candidate will have a Bachelor's degree in a related field, at least 4 years of substrate design experience, and be proficient with tools like Cadence APD and Mentor Xpedition. This position allows for a hybrid work model in Penang, Malaysia.

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