Senior IC Verification Lead – UVM/SystemVerilog

Bitdeer Technologies Group

Full-time Other-General
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Location
singapore, singapore, Singapore
Posted
July 06, 2026

Job Description

Bitdeer Technologies Group in Singapore is seeking a Design Verification Engineer to support the IC development team in ensuring the functional correctness of complex digital designs. This position involves applying UVM, SystemVerilog, and developing comprehensive verification methodologies.

The ideal candidate will possess a strong understanding of design under test, implement test cases, and execute simulations while collaborating closely with engineers. A commitment to quality and the ability to document verification processes is essential.

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