Senior DFT Architect & Lead - Chip Test Strategy

Aion Silicon

Full-time Ingeniería y tecnología
Apply Now
Location
barcelona, cataluña, Spain
Posted
June 19, 2026

Job Description

A leading technology firm based in Barcelona is seeking an experienced DFT Engineer to lead chip-level Design for Test execution. The ideal candidate will drive DFT delivery from architecture definition through pattern generation and silicon bring-up, ensuring high-quality implementation and effective debug. With 10+ years of experience and expertise in DFT tools, this role calls for strong project management skills and the ability to innovate. This position is part of a global team with flexible location options.
#J-18808-Ljbffr