Location
montreal (administrative region), qc, Canada
Posted
June 19, 2026
Job Description
Elevate your career with a Senior ASIC Design Verification Engineer role at Synopsys Canada, focusing on HBM products. Utilize SystemVerilog and UVM to verify complex designs in this collaborative environment.
At Synopsys Canada, we seek an experienced ASIC Digital Verification Engineer to join our mixed-signal design team. With over 10 years of digital design experience, you will develop and implement verification plans while automating workflows using Python or Perl. Your proactive approach and strong debugging skills will be vital in ensuring product quality and accelerating development timelines.
Key Responsibilities:
• Develop verification plans for high-performance HBM designs
• Write advanced test cases using SystemVerilog and UVM
• Debug complex testbench and design issues
• Automate verification processes to boost productivity
• Collaborate on design reviews and improvements
Requirements:
• Bachelor’s or Master’s in Electrical Engineering
• 10+ ye...
At Synopsys Canada, we seek an experienced ASIC Digital Verification Engineer to join our mixed-signal design team. With over 10 years of digital design experience, you will develop and implement verification plans while automating workflows using Python or Perl. Your proactive approach and strong debugging skills will be vital in ensuring product quality and accelerating development timelines.
Key Responsibilities:
• Develop verification plans for high-performance HBM designs
• Write advanced test cases using SystemVerilog and UVM
• Debug complex testbench and design issues
• Automate verification processes to boost productivity
• Collaborate on design reviews and improvements
Requirements:
• Bachelor’s or Master’s in Electrical Engineering
• 10+ ye...