Senior Analog Design Engineer

Cynet Systems

Full-time Engineers
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Location
Santa Clara, California, United States
Posted
July 02, 2026

Job Description


Job Description:

Pay Range: $105hr - $110hr

Requirement/Must Have:

  • Strong analog and mixed-signal CMOS design background.
  • Proficiency with Cadence IC design tools (Virtuoso Schematic/Layout).
  • Experience with analog simulation using Spectre and ADE.
  • Knowledge of digital RTL design using SystemVerilog.
  • Solid understanding of IC device physics, SPICE models, ESD, latch-up, and manufacturing technology.
    • Experience:
  • Master’s degree in Electrical Engineering or equivalent.
  • At least five years of industry experience in mixed-signal ASIC design.
    • Responsibilities:
  • Negotiate design specifications with internal customers and stakeholders.
  • Translate IC fabrication process capabilities into practical circuit designs.
  • Design, simulate, and verify analog and digital CMOS circuits.
  • Review and supervise custom analog circuit layouts...

    • Job Details

    • Job Type
      Full-time
    • Category
      Engineers
    • Date Posted
      July 02, 2026
    • Application Deadline
      August 11, 2026