Principal Engineer, Design Verification

Full time Engineers

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Job Summary

We are seeking a highly experienced Principal Verification Engineer to lead and drive functional verification for complex ASIC/SoC designs. This role requires deep technical expertise, strong architecture-level thinking, strong understanding of Ethernet specifications, and the ability to mentor teams while ensuring delivery of high-quality silicon. The ideal candidate will own verification strategy end-to-end and work closely with design, architecture, and post-silicon teams. The candidate will play a key role in ensuring standards compliance, performance, interoperability and robustness of ethernet products.

Key Responsibilities

Technical Leadership

Define and own verification strategy and methodology (UVM/SystemVerilog) at IP, subsystem, and SoC levels

Thoroughly understand and interpret Ethernet and related prot...