Principal Engineer

Silicon Patterns

Full-time architecture,debugging,design,red,sed,test
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Location
bengaluru, karnataka, India
Posted
June 04, 2026

Job Description

Job Title: Verification Design Engineer (PCIe Gen 3/4/5/6)

Location: Bangalore

Company: Silicon Patterns

Experience: 7+ Years

Notice Period: Immediate to 60 Days

Job Overview

Silicon Patterns is looking for a highly skilled Verification Design Engineer with strong expertise in PCIe (Gen 3/4/5/6) protocols. The ideal candidate will have significant experience in advanced verification methodologies and SoC/IP verification.

Key Responsibilities

  • Develop and execute verification plans for PCIe-based IPs and subsystems
  • Design and implement testbenches using SystemVerilog/UVM
  • Perform functional verification of PCIe Gen3/Gen4/Gen5/Gen6 designs
  • Develop test cases, sequences,...