New College Grad - Memory Cell Test Structure Design And Layout

Full-time Other-General

ResponsibilitiesDesign and layout memory cell & support circuitry-based test structures for advanced technology nodes.Collaborate with Process Integration, Electrical Characterization, Device, Reliability, Design Rule, CAD, and other engineering teams.Support process development through interaction with mask development/OPC, product and design teams, and mask shop.Verify and validate test structure documentation and parametric data.Assist with parametric correlation and debug activities.Minimum QualificationsMaster's degree in Electrical, Computer, or Microelectronic EngineeringHands‐on experience with EDA tools (Cadence Virtuoso Layout and Schematic Editor, Calibre).
Strong circuit design, layout, schematic, and verification skills including DRC, LVS, and circuit simulation (HSPICE).
Strong knowledge of semiconductor device physics, operation, parametric testing, and DFM.Familiarity with memory array design architectures, fab processes, and failure modes.Ability to interpre...