Junior Hardware Verification Engineer (SystemVerilog)
JBS Global - Jaffer Business Systems
Full-time
Engineering
Location
islamabad, islamabad capital territory, Pakistan
Posted
July 19, 2026
Job Description
JBS Global - Jaffer Business Systems in Islamabad is seeking a junior verification engineer to assist with testbench development and verification tasks. You will learn SystemVerilog and UVM under senior engineers and contribute to basic test case writing and waveform analysis.
The role emphasizes collaboration, strong digital design fundamentals, and disciplined engineering processes in a structured environment.
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