Location
zurich, on, Canada
Posted
July 20, 2026
Job Description
Bring your skills to a transformative role as a Senior Digital Design & Verification Engineer in Zurich, specializing in RTL, UVM, and microarchitecture. This role offers a unique hybrid focus within a deep-tech architecture environment.
In this senior position, you will play a crucial role in developing RTL for compute subsystems, contributing to microarchitecture standards and engaging in technical reviews. Additionally, you will construct UVM-based verification environments and assist with FPGA and silicon validation tasks, collaborating with multidisciplinary teams.
Key Responsibilities:
• Develop RTL for complex compute subsystems
• Engage in microarchitecture definitions and technical evaluations
• Build and maintain UVM verification environments
• Drive functional coverage and perform debugging tasks
• Assist with FPGA bring-up and silicon validation processes
Requirements:
• Strong RTL coding skills in S...
In this senior position, you will play a crucial role in developing RTL for compute subsystems, contributing to microarchitecture standards and engaging in technical reviews. Additionally, you will construct UVM-based verification environments and assist with FPGA and silicon validation tasks, collaborating with multidisciplinary teams.
Key Responsibilities:
• Develop RTL for complex compute subsystems
• Engage in microarchitecture definitions and technical evaluations
• Build and maintain UVM verification environments
• Drive functional coverage and perform debugging tasks
• Assist with FPGA bring-up and silicon validation processes
Requirements:
• Strong RTL coding skills in S...