Design Verification Engineer

ACL Digital

Full-time Engineers
Apply Now
Location
Mumbai, Maharashtra, India
Posted
June 10, 2026

Job Description

Experience: 2-3 Years
Location: Hyderabad
Education: B.E./B.Tech. in ECE/EEE or M.E./M.Tech. in VLSI/Electronics

Roles and Responsibilities

Strong expertise in UVM-based verification.
Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.

Share resumes at [email protected]