Location
San Jose, CA, United States
Posted
June 27, 2026
Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Design Engineering Architect – Roles & Responsibilities
+ Contribute to PHY architecture development with deep understanding of memory interface PHY IPs (e.g., DDR, LPDDR), including electrical, timing, power, and protocol considerations
+ Drive architecture decisions aligned with JEDEC standards, protocols, and compliance requirements
+ Good understanding of PHY/IO circuit architecture including TX/RX, clocking, termination, power delivery, and signal integrity trade‑offs
+ Act as a customer‑facing technical architect during pre‑sales, evaluations, and post‑delivery support, clearly articulating architecture choices and trade‑offs
+ Collaborate closely with Sales, Marketing, and Program teams to support customer engagements, RFIs, and technical proposals
+ Provide expert‑level IP support to customers, including archite...
Design Engineering Architect – Roles & Responsibilities
+ Contribute to PHY architecture development with deep understanding of memory interface PHY IPs (e.g., DDR, LPDDR), including electrical, timing, power, and protocol considerations
+ Drive architecture decisions aligned with JEDEC standards, protocols, and compliance requirements
+ Good understanding of PHY/IO circuit architecture including TX/RX, clocking, termination, power delivery, and signal integrity trade‑offs
+ Act as a customer‑facing technical architect during pre‑sales, evaluations, and post‑delivery support, clearly articulating architecture choices and trade‑offs
+ Collaborate closely with Sales, Marketing, and Program teams to support customer engagements, RFIs, and technical proposals
+ Provide expert‑level IP support to customers, including archite...