Backend Physical Design Lead Engineer

Mirafra Technologies

Full-time Engineers
Apply Now
Location
Bengaluru, Karnataka, India
Posted
June 05, 2026

Job Description

Job Title: Backend SoC Lead

Experience- 12+ years

Location: Bangalore


Key Responsibilities-

  • End-to-end PnR — floorplan to GDS handoff — on advanced FinFET nodes.
  • Timing closure with AOCV / POCV across PVT corners;
    late-stage ECO management.
  • Physical sign-off: DRC, LVS, ERC, power integrity (IR drop / EM).
  • Low-power implementation: multi-voltage, power gating, retention, DVFS.
  • Lead & mentor 5–15 backend engineers through tape-out milestones.
  • Primary technical interface with client program teams.



Must have-

12+ years backend physical design;
tapeout ownership at 16nm or below.

  • Innovus or ICC2 for PnR;
    PrimeTime or Tempus forSTA Calibre DRC / LVS sign-off and foundry rule resolution Tcl scripting for flow automation;
    Python a strong plus