Location
islamabad, islamabad capital territory, Pakistan
Posted
July 25, 2026
Job Description
Responsibilities
- Support testbench development under guidance of senior engineers
- Learn and apply concepts of System Verilog and UVM
- Assist in writing basic test cases and verification components
- Perform simulation runs and analyze waveform outputs
- Participate in debugging and regression testing cycles
- Demonstrate strong understanding of digital design fundamentals
- Good communication and willingness to work in a structured environment
- Ability to learn rapidly and follow engineering processes
Requirements
Experience: 1–2 years of experience in chip design or verification
Qualification: Bachelor's/Master's in Computer, Electrical, or Electronic Engineering