ASIC DTCO & Timing Engineer for Next‑Gen Process
Qualcomm
Full-time
Ingeniería industrial, construcción de herramientas, máquinas e instalaciones
Location
tijuana, baja california, Mexico
Posted
July 16, 2026
Job Description
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA is seeking an engineer to evaluate PPAY for SOC products and perform Spice simulations for power and performance validation. You will drive block-level PPA analysis and RTL-to-GDS flows for hard macros, collaborating with foundry DTCO, CAD, and IP teams to optimize Fmax and cost across 5nm to 2nm process technologies.
The role requires strong Python/C/C++ skills and experience in ASIC design, verification, and integration, with a
#J-18808-Ljbffr