Job Description
Description Analog Layout engineers are pivotal in delivering Analog Mixed‐Signal IP in a SOC flow. You will collaborate with teams of highly skilled individuals to develop the next generation of world‐leading SOCs. Your responsibilities include crafting sophisticated layouts for mixed‐signal and analog circuits, reviewing floorplans, and analyzing intricate circuits with circuit designers. You'll run complete sets of design verification tools, plan/schedule work, and coordinate vital layout tradeoffs. Interpretation of LVS, DRC, and ERC reports is key to finding the fastest way to complete the layout, exceeding engineering specifications and expectations. Minimum Qualifications BS and a minimum of 10 years relevant industry experience. Preferred Qualifications 10+ years of experience in analog/mixed‐signal layout design, with a focus on deep submicron CMOS circuits and at least 3+ years in FinFET technologies. Programming/scripting knowledge in SKILL, Perl, TCL, Shell, and/or ...